| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... ACM SIGARCH Computer Architecture News 42 (3), 13-24, 2014 | 1598 | 2014 |
| A cloud-scale acceleration architecture AM Caulfield, ES Chung, A Putnam, H Angepat, J Fowers, M Haselman, ... 2016 49th Annual IEEE/ACM international symposium on microarchitecture …, 2016 | 925 | 2016 |
| Azure accelerated networking:{SmartNICs} in the public cloud D Firestone, A Putnam, S Mundkur, D Chiou, A Dabagh, M Andrewartha, ... 15th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2018 | 812 | 2018 |
| A configurable cloud-scale DNN processor for real-time AI J Fowers, K Ovtcharov, M Papamichael, T Massengill, M Liu, D Lo, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 710 | 2018 |
| Accelerating deep convolutional neural networks using specialized hardware K Ovtcharov, O Ruwase, JY Kim, J Fowers, K Strauss, ES Chung Microsoft Research Whitepaper 2 (11), 1-4, 2015 | 544 | 2015 |
| Serving dnns in real time at datacenter scale with project brainwave E Chung, J Fowers, K Ovtcharov, M Papamichael, A Caulfield, ... iEEE Micro 38 (2), 8-20, 2018 | 409 | 2018 |
| Single-chip heterogeneous computing: Does the future include custom logic, FPGAs, and GPGPUs? ES Chung, PA Milder, JC Hoe, K Mai 2010 43rd annual IEEE/ACM international symposium on microarchitecture, 225-236, 2010 | 350 | 2010 |
| Development and evaluation of emerging design patterns for ubiquitous computing ES Chung, JI Hong, J Lin, MK Prabaker, JA Landay, AL Liu Proceedings of the 5th conference on Designing interactive systems …, 2004 | 256 | 2004 |
| CoRAM: an in-fabric memory architecture for FPGA-based computing ES Chung, JC Hoe, K Mai Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011 | 214 | 2011 |
| A high memory bandwidth fpga accelerator for sparse matrix-vector multiplication J Fowers, K Ovtcharov, K Strauss, ES Chung, G Stitt 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014 | 196 | 2014 |
| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... IEEE Micro 35 (3), 10-22, 2015 | 187 | 2015 |
| Deep neural network processing on hardware accelerators with stacked memory DC Burger, D Chiou, E Chung, AR Putnam US Patent 10,540,588, 2020 | 154 | 2020 |
| Linqits: Big data on little clients ES Chung, JD Davis, J Lee ACM SIGARCH Computer Architecture News 41 (3), 261-272, 2013 | 148 | 2013 |
| Pushing the limits of narrow precision inferencing at cloud scale with microsoft floating point B Darvish Rouhani, D Lo, R Zhao, M Liu, J Fowers, K Ovtcharov, ... Advances in neural information processing systems 33, 10271-10281, 2020 | 130 | 2020 |
| Convolutional neural networks on hardware accelerators E Chung, K Strauss, K Ovtcharov, JY Kim, O Ruwase US Patent App. 14/754,367, 2016 | 124 | 2016 |
| ProtoFlex: Towards scalable, full-system multiprocessor simulations using FPGAs ES Chung, MK Papamichael, E Nurvitadhi, JC Hoe, K Mai, B Falsafi ACM Transactions on Reconfigurable Technology and Systems (TRETS) 2 (2), 1-32, 2009 | 122 | 2009 |
| Towards a universal FPGA matrix-vector multiplication architecture S Kestur, JD Davis, ES Chung 2012 IEEE 20th International Symposium on Field-Programmable Custom …, 2012 | 120 | 2012 |
| Hardware accelerated neural network subgraphs RK Kovvuri, AM El Husseini, SK Reinhardt, D Lo, ES Chung, SS Seera, ... US Patent App. 15/971,850, 2019 | 109 | 2019 |
| Toward accelerating deep learning at scale using specialized hardware in the datacenter K Ovtcharov, O Ruwase, JY Kim, J Fowers, K Strauss, ES Chung 2015 IEEE Hot Chips 27 Symposium (HCS), 1-38, 2015 | 93 | 2015 |
| Universal fpga/asic matrix-vector multiplication architecture JD Davis, E Chung, S Kestur US Patent 9,317,482, 2016 | 92 | 2016 |
Doug BurgerCorporate VP, Managing Director, Microsoft Research CoreVerified email at microsoft.com
