Hsuan (Julie) Hsiao

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Jason AndersonElectrical and Computer Engineering, University of TorontoVerified email at eecg.toronto.edu
Stephen BrownUniversity of TorontoVerified email at eecg.toronto.edu
Andrew CanisPh.D., University of TorontoVerified email at eecg.utoronto.ca
Jongsok ChoiPh.D, University of TorontoVerified email at mail.utoronto.ca
Yu Ting ChenPhD Candidate, University of TorontoVerified email at mail.utoronto.ca
Fabrizio FerrandiPolitecnico di MilanoVerified email at polimi.it
Christian PilatoAssistant Professor, Politecnico di MilanoVerified email at polimi.it
Vlad-Mihai SimaIlluminaVerified email at illumina.com
Razvan NaneCofounder, BDA, The NetherlandsVerified email at bigdataccelerate.com
Koen BertelsQBee.eu, University of Porto and professor University of Ghent (in process)Verified email at qbee.eu
Joshua San MiguelAssistant Professor of Electrical and Computer Engineering, University of Wisconsin-MadisonVerified email at wisc.edu
Di WuUniversity of Wisconsin-MadisonVerified email at ece.wisc.edu
Ruokai YinPhD student in ECE, Yale UniversityVerified email at yale.edu
Younghyun KimAssistant Professor, University of Wisconsin–MadisonVerified email at wisc.edu
Jingjie Li (李竞捷)University of Wisconsin-MadisonVerified email at wisc.edu
Jeffrey GoedersBrigham Young UniversityVerified email at byu.edu
Ruolong LianLegUp Computing Inc.Verified email at mail.utoronto.ca
Natalie Enright JergerUniversity of TorontoVerified email at eecg.toronto.edu
Mario BadrUniversity of TorontoVerified email at utoronto.ca
Yuko Hara-AzumiTokyo Institute of TechnologyVerified email at cad.ict.e.titech.ac.jp

Hsuan (Julie) Hsiao

Electrical and Computer Engineering, University of Toronto

Verified email at mail.utoronto.ca

high-level synthesis computer-aided design stochastic computing FPGA


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A survey and evaluation of FPGA high-level synthesis tools R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015	568	2015
Legup high-level synthesis A Canis, J Choi, B Fort, B Syrowik, RL Lian, YT Chen, H Hsiao, J Goeders, ... FPGAs for Software Programmers, 175-190, 2016	23	2016
The eh model: Early design space exploration of intermittent processor architectures J San Miguel, K Ganesan, M Badr, C Xia, R Li, H Hsiao, NE Jerger 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018	20	2018
UGEMM: Unary computing architecture for GEMM applications D Wu, J Li, R Yin, H Hsiao, Y Kim, J San Miguel 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020	15	2020
High-level synthesis of software-customizable floating-point cores S Bansal, H Hsiao, T Czajkowski, JH Anderson Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, 37-42, 2018	12	2018
Thread weaving: Static resource scheduling for multithreaded high-level synthesis H Hsiao, J Anderson 2019 56th ACM/IEEE Design Automation Conference (DAC), 1-6, 2019	7	2019
uGEMM: Unary Computing for GEMM Applications D Wu, J Li, R Yin, H Hsiao, Y Kim, J San Miguel IEEE Micro 41 (3), 50-56, 2021	4	2021
Sensei: An area-reduction advisor for FPGA high-level synthesis H Hsiao, JH Anderson 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 25-30, 2018	4	2018
Cgra-me: An open-source framework for cgra architecture and cad research J Anderson, R Beidas, V Chacko, H Hsiao, X Ling, O Ragheb, X Wang, ... 2021 IEEE 32nd International Conference on Application-specific Systems …, 2021	3	2021
Zero correlation error: A metric for finite-length bitstream independence in stochastic computing H Hsiao, JS Miguel, Y Hara-Azumi, J Anderson Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021	3	2021
Double-pumping the interconnect for area reduction in coarse-grained reconfigurable arrays X Wang, T Yu, H Hsiao, J Anderson 2021 IEEE 32nd International Conference on Application-specific Systems …, 2021	2	2021
Generating stochastic bitstreams H Hsiao, J Anderson, Y Hara-Azumi Stochastic Computing: Techniques and Applications, 137-152, 2019	1	2019
Homomorphically Encrypted Computation using Stochastic Encodings H Hsiao, V Lee, B Reagen, A Alaghi arXiv preprint arXiv:2203.02547, 2022		2022
Streaming Accuracy: Characterizing Early Termination in Stochastic Computing H Hsiao, J San Miguel, J Anderson 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 320-325, 2022		2022
Making HLS a Bit Wiser: From Standard High-Level Datatypes to Arbitrary Low-Level Bitwidths H Hsiao University of Toronto (Canada), 2017		2017

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