Prati
Jen-Lung Liu
Jen-Lung Liu
Potvrđena adresa e-pošte na intel.com
Naslov
Citirano
Citirano
Godina
A 0.004mm2250μW ΔΣ TDC with time-difference accumulator and a 0.012mm22.5mW bang-bang digital PLL using PRNG for low-power SoC applications
JP Hong, SJ Kim, J Liu, N Xing, TK Jang, J Park, J Kim, T Kim, H Park
2012 IEEE International Solid-State Circuits Conference, 240-242, 2012
852012
15.2 A 0.012mm2 3.1mW bang-bang digital fractional-N PLL with a power-supply-noise cancellation technique and a walking-one-phase-selection fractional …
J Liu, TK Jang, Y Lee, J Shin, S Lee, T Kim, J Park, H Park
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
632014
A 0.026mm25.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter
TK Jang, X Nan, F Liu, J Shin, H Ryu, J Kim, T Kim, J Park, H Park
2013 IEEE international solid-state circuits conference digest of technical …, 2013
342013
Digital phase-locked loop using phase-to-digital converter, method of operating the same, and devices including the same
TK Jang, J Liu, N Xing, JJ Park
US Patent 9,041,443, 2015
262015
A 1-V, 1.4-2.5 GHz charge-pump-less PLL for a phase interpolator based CDR
J Park, JF Liu, LR Carley, CP Yue
2007 IEEE Custom Integrated Circuits Conference, 281-284, 2007
182007
A 0.8 V, sub-mW, varactor-tuning ring-oscillator-based clock generator in 32nm CMOS
J Liu, S Jeon, TK Jang, D Kim, J Kim, J Park, H Park
IEEE Asian Solid-State Circuits Conference 2011, 337-340, 2011
132011
Development of self-contained sensor skin for highway bridge monitoring
J Jang, JF Liu, CP Yue, H Sohn
Smart Structures and Materials 2006: Sensors and Smart Structures …, 2006
82006
Dither control circuit and devices having the same
JP Hong, J Liu, N Xing, JJ Park
US Patent 8,847,653, 2014
62014
All-digital phase-locked loop for adaptively controlling closed-loop bandwidth, method of operating the same, and devices including the same
JJ Park, TK Jang, N Xing, JL Liu
US Patent 9,077,351, 2015
42015
Phase-locked loop, method of operating the same, and devices having the same
JJ Park, TK Jang, J Liu
US Patent 8,981,824, 2015
42015
Highly-integrated low-power WCDMA SiGe transceiver for mobile terminals
HY Shih, TH Fu, YH Chen, JL Liu, PU Su, KC Juang, TY Yang
IEEE MTT-S International Microwave Symposium Digest, 2005., 237-240, 2005
42005
Current generator, method of operating the same, and electronic system including the same
TK Jang, JL Liu, N Xing, JJ Park
US Patent 9,618,958, 2017
32017
Phase locked loop circuit
N Xing, J Park, J Liu, J Tae-Kwang
US Patent 9,214,946, 2015
32015
A highly-integrated inductor-less SiGe W-CDMA transmitter
HY Shih, PU Su, YH Chen, TH Fu, JL Liu, KC Juang, MC Kuo, CM Hsu
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of …, 2004
32004
Multi-phase generator
TK Jang, JL Liu, N Xing, JJ Park
US Patent 8,981,828, 2015
12015
A Sub-1V, 1.6 mW, 2.06 GHz clock generator for mobile SoC applications in 32nm CMOS
FJ Liu, S Jeon, TK Jang, D Kim, J Kim, J Park, BH Park
2010 International SoC Design Conference, 342-344, 2010
2010
A 0.35/spl mu/m SiGe BiCMOS frequency synthesizer for WCDMA mobile terminals
JL Liu
2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and …, 2005
2005
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