| Energy efficient single-ended 6-T SRAM for multimedia applications N Surana, J Mekie IEEE Transactions on Circuits and Systems II: Express Briefs 66 (6), 1023-1027, 2018 | 58 | 2018 |
| Robust and high-performance 12-T interlocked SRAM for in-memory computing N Surana, M Lavania, A Barma, J Mekie 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 18 | 2020 |
| Guarded dual rail logic for soft error tolerant standard cell library R Kaur, N Surana, J Mekie 2016 16th European Conference on Radiation and Its Effects on Components and …, 2016 | 8 | 2016 |
| A mathematical approach towards quantization of floating point weights in low power neural networks JK Devnath, N Surana, J Mekie 2020 33rd International Conference on VLSI Design and 2020 19th …, 2020 | 5 | 2020 |
| Power and area efficient approximate heterogeneous 8T SRAM for multimedia applications PK Bharti, N Surana, J Mekie 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 5 | 2019 |
| A low-voltage split memory architecture for binary neural networks JK Devnath, N Surana, J Mekie 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 3 | 2020 |
| Read-decoupled radiation hardened RD-DICE SRAM cell for low-power space applications M Lavania, N Surana, I Anand, J Mekie 2019 IEEE International Conference on Electron Devices and Solid-State …, 2019 | 3 | 2019 |
| Hetro8T: power and area efficient approximate heterogeneous 8T SRAM for H. 264 video decoder PK Bharti, N Surana, J Mekie IET Computers & Digital Techniques 13 (6), 505-513, 2019 | 2 | 2019 |
| Energy and area efficient 11-T ternary content addressable memory for high-speed search D Datta, P Dewangan, N Surana, J Mekie 2019 IEEE International Conference on Electron Devices and Solid-State …, 2019 | 2 | 2019 |
| Impact of high-κ spacer on circuit level performance of junctionless FinFET N Surana, J Mekie, NR Mohapatra 2017 International Conference on Electron Devices and Solid-State Circuits …, 2017 | 2 | 2017 |
| Short and deep drain MOSFET for space applications: Device and circuit level analysis N Surana, R Kaur, J Mekie 2016 16th European Conference on Radiation and Its Effects on Components and …, 2016 | 2 | 2016 |
| A 10T, 0.22fJ/Bit/Search Mixed-VT Pseudo Precharge-Free Content Addressable Memory D Datta, N Surana, A Kumar, J Mekie IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 1572-1576, 2021 | 1 | 2021 |
| In0 25Ga0 75As channel double gate junctionless transistor B Ghosh, N Surana, MW Akram, BMM Tripathi Journal of Low Power Electronics 10 (1), 101-106, 2014 | 1 | 2014 |
| A silicon germanium graded junctionless transistor with low off current N Surana, B Ghosh, BMM Tripathy, AK Salimath International Journal of Nanoscience 12 (06), 1350043, 2013 | 1 | 2013 |
| Dynamic adjustment of wordline timing in static random access memory RF Wiser, N Surana US Patent 11,935,587, 2024 | | 2024 |
| One transistor memory bitcell with arithmetic capability N Surana, RF Wiser US Patent 11,862,282, 2024 | | 2024 |
| Dynamic Adjustment of Word Line Timing in Static Random Access Memory JA Chesavage, R Wiser, N Surana US Patent App. 17/734,045, 2023 | | 2023 |
| Process for Scan Chain in a Memory RF Wiser, S Singh, N Surana US Patent App. 18/144,848, 2023 | | 2023 |
| Scan chain for memory with reduced power consumption RF Wiser, S Singh, N Surana US Patent 11,693,056, 2023 | | 2023 |
| HyGain: High-performance, Energy-efficient Hybrid Gain Cell-based Cache Hierarchy S Singh, N Surana, K Prasad, P Jain, J Mekie, M Awasthi ACM Transactions on Architecture and Code Optimization 20 (2), 1-20, 2023 | | 2023 |
