| Layer minimization of escape routing in area array packaging R Wang, R Shi, CK Cheng Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 42 | 2006 |
| GIS-based red soil resources classification and evaluation YM Hu, J Dai, RC Wang Pedosphere 9 (2), 131-138, 1999 | 32 | 1999 |
| 3-D floorplanning using labeled tree and dual sequences R Wang, EFY Young, Y Zhu, FC Graham, R Graham, CK Cheng Proceedings of the 2008 international symposium on Physical design, 54-59, 2008 | 19 | 2008 |
| Low power passive equalizer design for computer memory links L Zhang, W Yu, Y Zhang, R Wang, A Deutsch, GA Katopis, DM Dreps, ... 2008 16th IEEE Symposium on High Performance Interconnects, 51-56, 2008 | 13 | 2008 |
| Representing topological structures for 3-D floorplanning R Wang, EFY Young, CK Cheng 2009 International Conference on Communications, Circuits and Systems, 1098-1102, 2009 | 12 | 2009 |
| 光强对苗期烤烟光合作用及干物质生产的影响 王瑞， 刘国顺， 陈国华， 向德恩， 吴云平 应用生态学报, 2072-2077, 2010 | 10 | 2010 |
| Capping-agent-free synthesis of catkin-like cob microstrucutres composed of untrathin nanosheets and their catalytic performance in the hydrolysis of sodium borohydride J Yan, H Li, K Feng Int J Electrochem Sci 11, 226-232, 2016 | 8 | 2016 |
| Complexity of 3-D floorplans by analysis of graph cuboidal dual hardness R Wang, E Young, CK Cheng ACM Transactions on Design Automation of Electronic Systems (TODAES) 15 (4 …, 2010 | 8 | 2010 |
| Analysis and Optimization of Low-Power Passive Equalizers for CPU–Memory Links L Zhang, W Yu, Y Zhang, R Wang, A Deutsch, GA Katopis, DM Dreps, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (9 …, 2011 | 7 | 2011 |
| Noise minimization during power-up stage for a multi-domain power network W Zhang, Y Zhu, W Yu, A Shayan, R Wang, Z Zhu, CK Cheng 2009 Asia and South Pacific Design Automation Conference, 391-396, 2009 | 7 | 2009 |
| X70 管线钢在模拟近中性土壤介质中的电化学特性 李明星， 王荣， 白真权 腐蚀科学与防护技术 16 (1), 17-20, 2004 | 7 | 2004 |
| Bus matrix synthesis based on steiner graphs for power efficient system-on-chip communications R Wang, Y Zhang, NC Chou, EFY Young, CK Cheng, R Graham IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 6 | 2011 |
| An improved p-admissible floorplan representation based on corner block list R Wang, S Dong, X Hong Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 5 | 2005 |
| 无隔膜电解法制取丁二酸 张宏坤， 王瑞芝， 李珊， 顾登平 河北师范大学学报: 自然科学版 22 (4), 508-510, 1998 | 5 | 1998 |
| Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications R Wang, NC Chou, B Salefski, CK Cheng Proceedings of the 46th Annual Design Automation Conference, 166-171, 2009 | 4 | 2009 |
| 高耸塔器风致疲劳寿命时域分析 汪睿， 陈学东， 范志超 中国机械工程 26 (17), 2308, 2015 | 3 | 2015 |
| 服务型制造车间关键任务调度的 Stackelberg 博弈研究 周光辉， 程元森， 肖忠东， 苗发祥， 王蕊 中国机械工程 25 (3), 341, 2014 | 3 | 2014 |
| Scalable hierarchical floorplanning for fast physical prototyping of systems-on-chip R Wang, N Shah Proceedings of the 2012 ACM international symposium on International …, 2012 | 3 | 2012 |
| Physical synthesis of bus matrix for high bandwidth low power on-chip communications R Wang, EFY Young, R Graham, CK Cheng Proceedings of the 19th international symposium on Physical design, 91-96, 2010 | 2 | 2010 |
| Octilinear redistributive routing in bump arrays R Wang, CK Cheng Proceedings of the 19th ACM Great Lakes symposium on VLSI, 191-196, 2009 | 2 | 2009 |
