| Generalized hypercube and hyperbus structures for a computer network Bhuyan, Agrawal IEEE Transactions on computers 100 (4), 323-333, 1984 | 1214 | 1984 |
| CuSha: vertex-centric graph processing on GPUs F Khorasani, K Vora, R Gupta, LN Bhuyan Proceedings of the 23rd international symposium on High-performance parallel …, 2014 | 319 | 2014 |
| Performance of multiprocessor interconnection networks LN Bhuyan, Q Yang, DP Agrawal Computer 22 (2), 25-37, 1989 | 318 | 1989 |
| Compiling pcre to fpga for accelerating snort ids A Mitra, W Najjar, L Bhuyan Proceedings of the 3rd ACM/IEEE Symposium on Architecture for Networking and …, 2007 | 259 | 2007 |
| Design and performance of generalized interconnection networks Bhuyan, Agrawal IEEE Transactions on Computers 100 (12), 1081-1090, 1983 | 197 | 1983 |
| Performance characterization of a 10-Gigabit Ethernet TOE W Feng, P Balaji, C Baron, LN Bhuyan, DK Panda 13th Symposium on High Performance Interconnects (HOTI'05), 58-63, 2005 | 184 | 2005 |
| An adaptive submesh allocation strategy for two-dimensional mesh connected systems J Ding, LN Bhuyan 1993 International Conference on Parallel Processing-ICPP'93 2, 193-200, 1993 | 180 | 1993 |
| Scalable simd-efficient graph processing on gpus F Khorasani, R Gupta, LN Bhuyan 2015 International Conference on Parallel Architecture and Compilation (PACT …, 2015 | 166 | 2015 |
| Thread reinforcer: Dynamically determining number of threads via os level monitoring KK Pusukuri, R Gupta, LN Bhuyan 2011 IEEE International Symposium on Workload Characterization (IISWC), 116-125, 2011 | 142 | 2011 |
| Bandwidth availability of multiple-bus multiprocessors CR Das, LN Bhuyan IEEE Transactions on Computers 100 (10), 918-926, 1985 | 134 | 1985 |
| Approximate analysis of single and multiple ring networks LN Bhuyan, D Ghosal, Q Yang IEEE Transactions on Computers 38 (7), 1027-1040, 1989 | 133 | 1989 |
| An analysis of processor-memory interconnection networks LN Bhuyan IEEE Transactions on Computers 100 (3), 279-283, 1985 | 121 | 1985 |
| A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures ME Belviranli, LN Bhuyan, R Gupta ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-20, 2013 | 118 | 2013 |
| EaseCAM: An energy and storage efficient TCAM-based router architecture for IP lookup VC Ravikumar, RN Mahapatra, LN Bhuyan IEEE Transactions on Computers 54 (5), 521-533, 2005 | 117 | 2005 |
| Interconnection networks for parallel and distributed processing LN Bhuyan Computer 20 (6), 9-12, 1987 | 109 | 1987 |
| Software techniques to improve virtualized I/O performance on multi-core systems G Liao, D Guo, L Bhuyan, SR King Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking …, 2008 | 107 | 2008 |
| Load balancing in a cluster-based web server for multimedia applications J Guo, LN Bhuyan IEEE Transactions on Parallel and Distributed Systems 17 (11), 1321-1334, 2006 | 99 | 2006 |
| Anatomy and performance of SSL processing L Zhao, R Iyer, S Makineni, L Bhuyan IEEE International Symposium on Performance Analysis of Systems and Software …, 2005 | 91 | 2005 |
| Analysis and comparison of cache coherence protocols for a packet-switched multiprocessor Q Yang, LN Bhuyan, BC Liu IEEE Transactions on Computers 38 (8), 1143-1153, 1989 | 87 | 1989 |
| An efficient scheduling algorithm for combined input-crosspoint-queued (CICQ) switches X Zhang, LN Bhuyan IEEE Global Telecommunications Conference, 2004. GLOBECOM'04. 2, 1168-1173, 2004 | 81 | 2004 |
