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Yu Ting Chen
Yu Ting Chen
Verified email at mail.utoronto.ca
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A survey and evaluation of fpga high-level synthesis tools
R Nane, VM Sima, C Pilato, J Choi, B Fort, A Canis, YT Chen, H Hsiao, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
7342016
Automating the design of processor/accelerator embedded systems with legup high-level synthesis
B Fort, A Canis, J Choi, N Calagar, R Lian, S Hadjis, YT Chen, M Hall, ...
Embedded and Ubiquitous Computing (EUC), 2014 12th IEEE International …, 2014
462014
LegUp High-Level Synthesis
A Canis, J Choi, B Fort, B Syrowik, RL Lian, YT Chen, H Hsiao, J Goeders, ...
FPGAs for Software Programmers, 175-190, 2016
302016
Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software
YT Chen, JH Anderson
Field Programmable Logic and Applications (FPL), 2017 27th International …, 2017
172017
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