The key is left under the mat: On the inappropriate security assumption of logic locking schemes MT Rahman, S Tajik, MS Rahman, M Tehranipoor, N Asadizanjani 2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020 | 121 | 2020 |
Defense-in-depth: A recipe for logic locking to prevail MT Rahman, MS Rahman, H Wang, S Tajik, W Khalil, F Farahmandi, ... Integration 72, 39-57, 2020 | 104 | 2020 |
Security assessment of dynamically obfuscated scan chain against oracle-guided attacks MS Rahman, A Nahiyan, F Rahman, S Fazzari, K Plaks, F Farahmandi, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 26 (4 …, 2021 | 54* | 2021 |
O'clock: lock the clock via clock-gating for soc ip protection MS Rahman, R Guo, HM Kamali, F Rahman, F Farahmandi, ... Proceedings of the 59th ACM/IEEE Design Automation Conference, 775-780, 2022 | 27 | 2022 |
Rethinking watermark: Providing proof of IP ownership in modern socs NN Anandakumar, MS Rahman, MMM Rahman, R Kibria, U Das, ... Cryptology ePrint Archive, 2022 | 24 | 2022 |
ReTrustFSM: toward RTL hardware obfuscation-a hybrid FSM approach MS Rahman, R Guo, HM Kamali, F Rahman, F Farahmandi, ... IEEE Access 11, 19741-19761, 2023 | 21 | 2023 |
LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment MS Rahman, H Li, R Guo, F Rahman, F Farahmandi, M Tehranipoor 2021 IEEE International Test Conference (ITC), 180-189, 2021 | 13 | 2021 |
iPROBE: internal shielding approach for protecting against front-side and back-side probing attacks M Gao, MS Rahman, N Varshney, M Tehranipoor, D Forte IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 12 | 2023 |
Protecting obfuscated circuits against attacks that utilize test infrastructures MM Tehranipoor, DJ Forte, F Farahmandi, A Nahiyan, F Rahman, ... US Patent 11,222,098, 2022 | 8 | 2022 |
PSC-watermark: power side channel based IP watermarking using clock gates U Das, MS Rahman, NN Anandakumar, KZ Azar, F Rahman, ... 2023 IEEE European Test Symposium (ETS), 1-6, 2023 | 7 | 2023 |
LLE: mitigating IC piracy and reverse engineering by last level edit S Rahman, N Varshney, F Farahmandi, N Asadi Zanjani, M Tehranipoor International Symposium for Testing and Failure Analysis 84741, 360-369, 2023 | 6 | 2023 |
Metrics-to-methods: Decisive reverse engineering metrics for resilient logic locking MS Rahman, K Zamiri Azar, F Farahmandi, H Mardani Kamali Proceedings of the Great Lakes Symposium on VLSI 2023, 685-690, 2023 | 6 | 2023 |
CAD for hardware security F Farahmandi, MS Rahman, SR Rajendran, M Tehranipoor Springer, 2023 | 6 | 2023 |
Rtl-fsmx: Fast and accurate finite state machine extraction at the rtl for security applications R Kibria, MS Rahman, F Farahmandi, M Tehranipoor 2022 IEEE International Test Conference (ITC), 165-174, 2022 | 6 | 2022 |
CAPEC: A Cellular Automata Guided FSM-based IP Authentication Scheme MMM Rahman, MS Rahman, R Kibria, M Borza, B Reddy, A Cron, ... 2023 IEEE 41st VLSI Test Symposium (VTS), 1-8, 2023 | 5 | 2023 |
EvoLUTe: evaluation of look-up-table-based fine-grained IP redaction R Guo, MS Rahman, HM Kamali, F Rahman, F Farahmandi, ... 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 5 | 2023 |
ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs Z Ibnat, MS Rahman, MM Rahman, HM Kamali, M Tehranipoor, ... 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 2 | 2023 |
SHI-Lock: Enabling Co-Obfuscation for Secure Heterogeneous Integration Against RE and Cloning MSU Haque, R Guo, MS Rahman, HM Kamali, F Farahmandi, ... 2023 IEEE Physical Assurance and Inspection of Electronics (PAINE), 1-7, 2023 | 1 | 2023 |
CAD for Power Side-Channel Detection F Farahmandi, MS Rahman, SR Rajendran, M Tehranipoor CAD for Hardware Security, 123-147, 2023 | 1 | 2023 |
CAD for information leakage assessment F Farahmandi, MS Rahman, SR Rajendran, M Tehranipoor CAD for Hardware Security, 81-102, 2023 | 1 | 2023 |