| 14.7 a 288µw programmable deep-learning processor with 270kb on-chip weight storage using non-uniform memory hierarchy for mobile intelligence S Bang, J Wang, Z Li, C Gao, Y Kim, Q Dong, YP Chen, L Fick, X Sun, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 250-251, 2017 | 126 | 2017 |
| Analog in-memory subthreshold deep neural network accelerator L Fick, D Blaauw, D Sylvester, S Skrzyniarz, M Parikh, D Fick 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017 | 59 | 2017 |
| Floating-gate transistor array for performing weighted sum computation L Fick, DT Blaauw, D Sylvester, MB Henry, DA Fick US Patent 9,760,533, 2017 | 34 | 2017 |
| A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS L Fick, D Fick, M Alioto, D Blaauw, D Sylvester IEEE Journal of Solid-State Circuits 49 (11), 2462-2473, 2014 | 28 | 2014 |
| Analog matrix processor for edge AI real-time video analytics L Fick, S Skrzyniarz, M Parikh, MB Henry, D Fick 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 260-262, 2022 | 22 | 2022 |
| Low-power and compact analog-to-digital converter using spintronic racetrack memory devices Q Dong, K Yang, L Fick, D Fick, D Blaauw, D Sylvester IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (3), 907-918, 2016 | 22 | 2016 |
| Mixed-signal circuitry for computing weighted sum computation DA Fick, SJ SKRZYNIARZ, ELC Manar US Patent 10,255,551, 2019 | 13 | 2019 |
| 24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS S Skrzyniarz, L Fick, J Shah, Y Kim, D Sylvester, D Blaauw, D Fick, ... 2016 ieee international solid-state circuits conference (isscc), 420-422, 2016 | 10 | 2016 |
| Systems and methods for mapping matrix calculations to a matrix multiply accelerator D Fick, M Henry, L Fick, M Parikh, S Skrzyniarz, S Johnson, PC Wu, ... US Patent 10,409,889, 2019 | 6 | 2019 |
| System and methods for mixed-signal computing L Fick, ELC Manar, S Skrzyniarz, D Fick US Patent 10,389,375, 2019 | 6 | 2019 |
| Racetrack converter: A low power and compact data converter using racetrack spintronic devices Q Dong, K Yang, L Fick, D Fick, D Blaauw, D Sylvester 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 585-588, 2015 | 6 | 2015 |
| Analog Matrix Processor for Edge AI Real-Time Video Analytics. In 2022 IEEE International Solid-State Circuits Conference (ISSCC)(Vol. 65, pp. 260-262) L Fick, S Skrzyniarz, M Parikh, MB Henry, D Fick IEEE, 2022 | 5 | 2022 |
| System and methods for mixed-signal computing L Fick, ELC Manar, S Skrzyniarz, D Fick US Patent 10,255,205, 2019 | 4 | 2019 |
| Introduction to compute-in-memory L Fick, D Fick 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-65, 2019 | 3 | 2019 |
| A 25 Gb/s 470 μW active inductor equalizer for ground referenced signaling receivers L Fick, D Sylvester, J Poulton, J Wilson, T Gray 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 3 | 2017 |
| Rectified-linear and recurrent neural networks built with spin devices Q Dong, K Yang, L Fick, D Blaauw, D Sylvester 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 3 | 2017 |
| A 346μm2reference-free sensor interface for highly constrained microsystems in 28nm CMOS L Freyman, D Fick, D Blaauw, D Sylvester, M Alioto 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 105-108, 2013 | 3 | 2013 |
| Obstacle avoidance and boundary following behavior of the echolocating Bat L Freyman, S Livingston, TK Horiuchi, PS Krishnaprasad, CF Moss Final Report, MERIT BIEN Program, Univ. of Maryland (see http://scottman …, 2008 | 3 | 2008 |
| System and methods for mixed-signal computing L Fick, ELC Manar, S Skrzyniarz, D Fick US Patent 11,296,717, 2022 | 2 | 2022 |
| System and methods for mixed-signal computing L Fick, ELC Manar, S Skrzyniarz, D Fick US Patent 10,523,230, 2019 | 2 | 2019 |
