| Ferroelectric FET-based implementation of Fitzhugh-Nagumo neuron model D Rajasekharan, A Gaidhane, AR Trivedi, YS Chauhan IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 11 | 2021 |
| FerroCoin: ferroelectric tunnel junction-based true random number generator S Chatterjee, N Rangarajan, S Patnaik, D Rajasekharan, O Sinanoglu, ... IEEE Transactions on Emerging Topics in Computing, 2022 | 5 | 2022 |
| SCANet: Securing the weights with superparamagnetic-MTJ crossbar array networks D Rajasekharan, N Rangarajan, S Patnaik, O Sinanoglu, YS Chauhan IEEE transactions on neural networks and learning systems 34 (9), 5693-5707, 2021 | 4 | 2021 |
| Associative processing using negative capacitance FDSOI transistor for pattern recognition D Rajasekharan, P Kushwaha, YS Chauhan Microelectronics Journal 104, 104877, 2020 | 4 | 2020 |
| Non-boolean associative processing using FDSOI MOSFET-based inverter D Rajasekharan, P Kushwaha, SS Chauhan, YS Chauhan IEEE Transactions on Nanotechnology 17 (6), 1235-1243, 2018 | 4 | 2018 |
| Energy and area efficient tunnel FET-based spiking neural networks D Rajasekharan, SS Chauhan, AR Trivedi, YS Chauhan 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM …, 2018 | 3 | 2018 |
| Compact model parameter extraction using modular Q learning for nano-scale transistors A Dutta, D Rajasekharan, YS Chauhan 2020 5th IEEE International Conference on Emerging Electronics (ICEE), 1-4, 2020 | 2 | 2020 |
| Energy-efficient spiking neural networks based on tunnel FET D Rajasekharan, T Dutta, AR Trivedi, YS Chauhan 2016 3rd International Conference on Emerging Electronics (ICEE), 1-4, 2016 | 1 | 2016 |
| Symmetric BSIM-SOI—Part I: A Compact Model for Dynamically Depleted SOI MOSFETs CK Dabhi, D Rajasekharan, G Pahwa, D Nandi, N Karumuri, ... IEEE Transactions on Electron Devices, 2024 | | 2024 |
| SuperVAULT: Superparamagnetic Volatile Auxiliary Tamper-Proof Storage N Rangarajan, J Knechtel, D Rajasekharan, O Sinanoglu IEEE Embedded Systems Letters 14 (2), 103-106, 2021 | | 2021 |
| Neuromorphic Circuits on FDSOI Technology for Computer Vision Applications D Rajasekharan, AR Trivedi, YS Chauhan 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | | 2019 |
| Silicon and Column IV Semiconductors Devices CK Dabhi, D Rajasekharan, G Pahwa, D Nandi, K Nandan | | |
| Analog, Mixed-Signal, and RF Circuits A Hierarchical Performance Equation Library for Basic Op-Amp Design................. I. Abel, M. Neuner, and HE Graeb 1976 Deep H-GCN … Z Hou, N Zhang, B Yang, H Wang, M Zhu, S Yin, S Wei, L Liu, D Min, Y Ko, ... | | |
| SPECIAL ISSUE ON HARDWARE SECURITY FOR POST-CMOS TECHNOLOGIES IM Delgado-Lozano, E Tena-Sánchez, J Núñez, AJ Acosta, N Rangarajan, ... | | |
Yogesh S. ChauhanFellow IEEE, FNAE, Professor-IIT KanpurPotvrđena adresa e-pošte na iitk.ac.in
