Prati
Cunxi Yu
Naslov
Citirano
Citirano
Godina
Developing synthesis flows without human knowledge
C Yu, H Xiao, G De Micheli
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
1032018
Verification of gate-level arithmetic circuits by function extraction
M Ciesielski, C Yu, W Brown, D Liu, A Rossi
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
882015
Painting on placement: Forecasting routing congestion using conditional generative adversarial nets
C Yu, Z Zhang
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
842019
Incremental SAT-based reverse engineering of camouflaged logic circuits
C Yu, X Zhang, D Liu, M Ciesielski, D Holcomb
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
842017
Formal verification of arithmetic circuits by function extraction
C Yu, W Brown, D Liu, A Rossi, M Ciesielski
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
722016
Fast algebraic rewriting based on and-inverter graphs
C Yu, M Ciesielski, A Mishchenko
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
702017
Oracle-guided incremental SAT solving to reverse engineer camouflaged logic circuits
D Liu, C Yu, X Zhang, D Holcomb
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 433-438, 2016
602016
Understanding algebraic rewriting for arithmetic circuit verification: a bit-flow model
M Ciesielski, T Su, A Yasin, C Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
522019
Real-time multi-task diffractive deep neural networks via hardware-software co-design
Y Li, R Chen, B Sensale-Rodriguez, W Gao, C Yu
Scientific reports 11 (1), 11013, 2021
452021
LAMDA: Learning-assisted multi-stage autotuning for FPGA design closure
E Ustun, S Xiang, J Gui, C Yu, Z Zhang
2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019
422019
Logic synthesis meets machine learning: Trading exactness for generalization
S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ...
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
372021
Flowtune: Practical multi-armed bandits in boolean optimization
C Yu
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
352020
Decision making in synthesis cross technologies using lstms and transfer learning
C Yu, W Zhou
Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD, 55-60, 2020
332020
Physics-informed recurrent neural network for time dynamics in optical resonances
Y Tang, J Fan, X Li, J Ma, M Qi, C Yu, W Gao
Nature computational science 2 (3), 169-178, 2022
32*2022
Logic debugging of arithmetic circuits
S Ghandali, C Yu, D Liu, W Brown, M Ciesielski
2015 IEEE Computer Society Annual Symposium on VLSI, 113-118, 2015
292015
Automatic word-level abstraction of datapath
C Yu, M Ciesielski
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1718-1721, 2016
242016
Machine Learning Applications in Electronic Design Automation
H Ren, J Hu
Springer, 2022
232022
Efficient parallel verification of galois field multipliers
C Yu, M Ciesielski
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 238-243, 2017
232017
Impress: Large integer multiplication expression rewriting for fpga hls
E Ustun, I San, J Yin, C Yu, Z Zhang
2022 IEEE 30th Annual International Symposium on Field-Programmable Custom …, 2022
212022
Read your circuit: leveraging word embedding to guide logic optimization
WL Neto, MT Moreira, L Amaru, C Yu, PE Gaillardon
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
212021
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