Sharad Malik

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Suautori

Lintao ZhangMicrosoft Research AsiaPotvrđena adresa e-pošte na microsoft.com
Kurt KeutzerProfessor of the Graduate School, EECS, University of California, BerkeleyPotvrđena adresa e-pošte na berkeley.edu
Margaret MartonosiProfessor of Computer Science, Princeton UniversityPotvrđena adresa e-pošte na princeton.edu
Aarti GuptaPrinceton UniversityPotvrđena adresa e-pošte na cs.princeton.edu
Vivek TiwariIntel Corp, Princeton UniversityPotvrđena adresa e-pošte na intel.com
Andrew WolfeSanta Clara UniversityPotvrđena adresa e-pošte na scu.edu
Alberto Sangiovanni VincentelliProfessor of EECS, University of California, BerkeleyPotvrđena adresa e-pošte na eecs.berkeley.edu
Matthew MoskewiczTeslaPotvrđena adresa e-pošte na alumni.princeton.edu
Pramod SubramanyanIndian Institute of Technology KanpurPotvrđena adresa e-pošte na cse.iitk.ac.in
Guido AraujoIC-UNICAMPPotvrđena adresa e-pošte na ic.unicamp.br
Li-Shiuan PehProfessor of Computer Science, National University of SingaporePotvrđena adresa e-pošte na nus.edu.sg
Yakir VizelTechnionPotvrđena adresa e-pošte na cs.technion.ac.il
Georg WeissenbacherProfessor of Computer Science, TU WienPotvrđena adresa e-pošte na tuwien.ac.at
Jan RabaeyProfessor of EECS, University of California at BerkeleyPotvrđena adresa e-pošte na berkeley.edu
Sayak RaySecurity Researcher, Intel CorporationPotvrđena adresa e-pošte na intel.com
Shuyuan ZhangGoogle, Princeton UniversityPotvrđena adresa e-pošte na princeton.edu
David I. AugustComputer Science, Princeton UniversityPotvrđena adresa e-pošte na princeton.edu
Lawrence PileggiCoraluppi Head and Tanoto Professor of ECE, Carnegie Mellon UniversityPotvrđena adresa e-pošte na andrew.cmu.edu

Prati

Sharad Malik

Professor of Electrical and Computer Engineering, Princeton University

Potvrđena adresa e-pošte na princeton.edu - Početna stranica

Computer Engineering Electronic Design Automation Computer-Aided Design Formal Verification Hardware Verification


Naslov Poredaj po navodima Poredaj po godini Poredaj po naslovu	Citirano Citirano	Godina
Chaff: Engineering an efficient SAT solver MW Moskewicz, CF Madigan, Y Zhao, L Zhang, S Malik Proceedings of the 38th annual Design Automation Conference, 530-535, 2001	4914	2001
Power analysis of embedded software: A first step towards software power minimization V Tiwari, S Malik, A Wolfe IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2 (4), 437-445, 1994	1520	1994
System-level design: Orthogonalization of concerns and platform-based design K Keutzer, AR Newton, JM Rabaey, A Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 2000	1341	2000
Efficient conflict driven learning in a boolean satisfiability solver L Zhang, CF Madigan, MH Moskewicz, S Malik IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE …, 2001	1202	2001
Orion: A power-performance simulator for interconnection networks HS Wang, X Zhu, LS Peh, S Malik 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002	1009	2002
Instruction level power analysis and optimization of software V Tiwari, S Malik, A Wolfe, MTC Lee Technologies for wireless computing, 139-154, 1996	823	1996
Performance analysis of embedded software using implicit path enumeration YTS Li, S Malik Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers …, 1995	760	1995
Evaluating the security of logic encryption algorithms P Subramanyan, S Ray, S Malik 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015	737	2015
Logic verification using binary decision diagrams in a logic synthesis environment S Malik, AR Wang, RK Brayton, A Sangiovanni-Vincentelli 1988 IEEE International Conference on Computer-Aided Design, 6, 7, 8, 9-6, 7 …, 1988	729	1988
Conflict-driven clause learning SAT solvers J Marques-Silva, I Lynce, S Malik Handbook of satisfiability, 133-182, 2021	555	2021
Addressing the system-on-a-chip interconnect woes through communication-based design M Sgroi, M Sheets, A Mihal, K Keutzer, S Malik, J Rabaey, ... Proceedings of the 38th annual design automation conference, 667-672, 2001	527	2001
Power-driven design of router microarchitectures in on-chip networks H Wang, LS Peh, S Malik Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003	518	2003
The quest for efficient boolean satisfiability solvers L Zhang, S Malik Computer Aided Verification: 14th International Conference, CAV 2002 …, 2002	491	2002
A survey of optimization techniques targeting low power VLSI circuits S Devadas, S Malik Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, 242-247, 1995	450	1995
Algorithms for discrete function manipulation A Srinivasan, T Ham, S Malik, RK Brayton 1990 IEEE international conference on computer-aided design, 92, 93, 94, 95 …, 1990	433	1990
Validating SAT solvers using an independent resolution-based checker: Practical implementations and other applications L Zhang, S Malik 2003 Design, Automation and Test in Europe Conference and Exhibition, 880-885, 2003	402	2003
Cache miss equations: a compiler framework for analyzing and tuning memory behavior S Ghosh, M Martonosi, S Malik ACM Transactions on Programming Languages and Systems (TOPLAS) 21 (4), 703-746, 1999	385	1999
Power analysis and minimization techniques for embedded DSP software MTC Lee, V Tiwari, S Malik, M Fujita IEEE Transactions on Very Large Scale Integration (VLSI) Systems 5 (1), 123-135, 1997	368	1997
On solving the partial MAX-SAT problem Z Fu, S Malik International Conference on Theory and Applications of Satisfiability …, 2006	343	2006
Cache modeling for real-time software: Beyond direct mapped instruction caches YTS Li, S Malik, A Wolfe 17th IEEE Real-Time Systems Symposium, 254-263, 1996	331	1996

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