| A genetic algorithm for task scheduling on heterogeneous computing systems using multiple priority queues Y Xu, K Li, J Hu, K Li Information Sciences 270, 255-287, 2014 | 380 | 2014 |
| Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation J Hu, CJ Xue, WC Tseng, Y He, M Qiu, EHM Sha Proceedings of the 47th Design Automation Conference, 350-355, 2010 | 149 | 2010 |
| Accuracy vs. efficiency: Achieving both through fpga-implementation aware neural architecture search W Jiang, X Zhang, EHM Sha, L Yang, Q Zhuge, Y Shi, J Hu Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 126 | 2019 |
| Stream bench: Towards benchmarking modern distributed stream computing frameworks R Lu, G Wu, B Xie, J Hu 2014 IEEE/ACM 7th International Conference on Utility and Cloud Computing, 69-78, 2014 | 122 | 2014 |
| Data placement and duplication for embedded multicore systems with scratch pad memory Y Guo, Q Zhuge, J Hu, J Yi, M Qiu, EHM Sha IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 110 | 2013 |
| Hardware/software co-exploration of neural architectures W Jiang, L Yang, EHM Sha, Q Zhuge, S Gu, S Dasgupta, Y Shi, J Hu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 109 | 2020 |
| Towards energy efficient hybrid on-chip scratch pad memory with non-volatile memory J Hu, CJ Xue, Q Zhuge, WC Tseng, EHM Sha 2011 Design, Automation & Test in Europe, 1-6, 2011 | 108 | 2011 |
| Optimal data allocation for scratch-pad memory on embedded multi-core systems Y Guo, Q Zhuge, J Hu, M Qiu, EHM Sha 2011 International Conference on Parallel Processing, 464-471, 2011 | 106 | 2011 |
| Fixing the broken time machine: Consistency-aware checkpointing for energy harvesting powered non-volatile processor M Xie, M Zhao, C Pan, J Hu, Y Liu, CJ Xue Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 84 | 2015 |
| Software enabled wear-leveling for hybrid PCM main memory on embedded systems J Hu, Q Zhuge, CJ Xue, WC Tseng, EHM Sha 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 599-602, 2013 | 81 | 2013 |
| Energy-aware preemptive scheduling algorithm for sporadic tasks on DVS platform J Mei, K Li, J Hu, S Yin, EHM Sha Microprocessors and Microsystems 37 (1), 99-112, 2013 | 78 | 2013 |
| Data allocation optimization for hybrid scratch pad memory with SRAM and nonvolatile memory J Hu, CJ Xue, Q Zhuge, WC Tseng, EHM Sha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (6 …, 2012 | 73 | 2012 |
| On neural architecture search for resource-constrained hardware platforms Q Lu, W Jiang, X Xu, Y Shi, J Hu arXiv preprint arXiv:1911.00105, 2019 | 65 | 2019 |
| Achieving super-linear speedup across multi-fpga for real-time dnn inference W Jiang, EHM Sha, X Zhang, L Yang, Q Zhuge, Y Shi, J Hu ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-23, 2019 | 65 | 2019 |
| Write activity reduction on flash main memory via smart victim cache L Shi, CJ Xue, J Hu, WC Tseng, X Zhou, EHM Sha Proceedings of the 20th symposium on Great lakes symposium on VLSI, 91-94, 2010 | 64 | 2010 |
| Write activity reduction on non-volatile main memories for embedded chip multiprocessors J Hu, CJ Xue, Q Zhuge, WC Tseng, EHM Sha ACM Transactions on Embedded Computing Systems (TECS) 12 (3), 1-27, 2013 | 59 | 2013 |
| Dac-sdc low power object detection challenge for uav applications X Xu, X Zhang, B Yu, XS Hu, C Rowen, J Hu, Y Shi IEEE transactions on pattern analysis and machine intelligence 43 (2), 392-403, 2019 | 57 | 2019 |
| Minimizing write activities to non-volatile memory via scheduling and recomputation J Hu, CJ Xue, WC Tseng, Q Zhuge, EHM Sha 2010 IEEE 8th Symposium on Application Specific Processors (SASP), 101-106, 2010 | 55 | 2010 |
| Standing on the shoulders of giants: Hardware and neural architecture co-search with hot start W Jiang, L Yang, S Dasgupta, J Hu, Y Shi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 51 | 2020 |
| Device-circuit-architecture co-exploration for computing-in-memory neural accelerators W Jiang, Q Lou, Z Yan, L Yang, J Hu, XS Hu, Y Shi IEEE Transactions on Computers 70 (4), 595-605, 2020 | 50 | 2020 |
Jason XueCity University of Hong KongVerified email at cityu.edu.hk
