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SHIVENDRA SINGH PARIHAR
SHIVENDRA SINGH PARIHAR
Potvrđena adresa e-pošte na iitk.ac.in
Naslov
Citirano
Citirano
Godina
Evaluation of 10-nm Bulk FinFET RF Performance—Conventional Versus NC-FinFET
R Singh, K Aditya, SS Parihar, YS Chauhan, R Vega, TB Hook, A Dixit
IEEE Electron Device Letters 39 (8), 1246-1249, 2018
572018
BSIM compact model of quantum confinement in advanced nanosheet FETs
A Dasgupta, SS Parihar, P Kushwaha, H Agarwal, MY Kao, S Salahuddin, ...
IEEE Transactions on Electron Devices 67 (2), 730-737, 2020
472020
Compact Model for Geometry Dependent Mobility in Nanosheet FETs
A Dasgupta, SS Parihar, H Agarwal, P Kushwaha, YS Chauhan, C Hu
IEEE Electron Device Letters 41 (3), 313-316, 2020
252020
Compact modeling of negative-capacitance FDSOI FETs for circuit simulations
CK Dabhi, SS Parihar, A Dasgupta, YS Chauhan
IEEE Transactions on Electron Devices 67 (7), 2710-2716, 2020
202020
BSIM4 4.8. 1 MOSFET model
CK Dabhi, SS Parihar, H Agrawal, N Paydavosi, TH Morshed, DD Lu, ...
Dept. Elect. Eng. Comput. Sci., Univ. California, Berkeley, CA, Tech. Rep …, 2017
82017
Cryogenic CMOS for Quantum Processing: 5-nm FinFET-Based SRAM Arrays at 10 K
SS Parihar, VM van Santen, S Thomann, G Pahwa, YS Chauhan, ...
IEEE Transactions on Circuits and Systems I: Regular Papers, 2023
72023
Characterization and Global Parameter Extraction of bulk MOSFETs using BSIM-BULK Model
SS Parihar, C Jha, R Singh, R Gurjar, A Dixit
2018 5th IEEE Uttar Pradesh Section International Conference on Electrical …, 2018
52018
Efficient Implementation of Max-Pooling Algorithm Exploiting History-Effect in Ferroelectric-FinFETs
M Rafiq, SS Parihar, YS Chauhan, S Sahay
IEEE Transactions on Electron Devices, 2022
32022
Analysis and Compact Modeling of Drain-Extended FinFET
V Kumar, CK Dabhi, SS Parihar, YS Chauhan
2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK …, 2019
32019
Characterization and Modeling of 14-/16-nm FinFET-Based LDMOS
A Kar, SS Parihar, JZ Huang, H Zhang, W Wang, K Imura, YS Chauhan
IEEE Transactions on Electron Devices, 2023
22023
BSIM4 User Manual
CK Dabhi, SS Parihar, H Agrawal, N Paydavosi, TH Morshed
University of California, Berkeley, 2017
22017
A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs
SS Parihar, A Pampori, P Dwivedi, J Huang, W Wang, K Imura, C Hu, ...
IEEE Journal of the Electron Devices Society, 2023
12023
Design Automation for Cryogenic CMOS Circuits
VM van Santen, M Walter, F Klemme, SS Parihar, G Pahwa, YS Chauhan, ...
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
12023
High-Frequency Characterization and Modeling of Low and High Voltage FinFETs for RF SoCs
YS Chauhan, A Kar, SS Parihar, JZ Huang, H Zhang, W Wang, K Imura
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2023
12023
Cryogenic Characterization and Model Extraction of 5nm Technology Node FinFETs
SS Parihar, G Pahwa, JZ Huang, W Wang, K Imura, C Hu, YS Chauhan
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2023
12023
Modeling and Benchmarking 5nm Ferroelectric FinFET from Room Temperature down to Cryogenic Temperatures
S Singh Parihar, S Chatterjee, G Pahwa, Y Singh Chauhan, H Amrouch
IEEE 23rd International Conference on Nanotechnology (NANO), 2023
12023
Self-Heating characterization and modeling of 5nm technology node FinFETs
SS Parihar, JZ Huang, W Wang, K Imura, YS Chauhan
2022 Device Research Conference (DRC), 1-2, 2022
12022
Cryogenic Brain-inspired Hyperdimensional In-Memory Computing using 5nm Ferroelectric FinFET
SS Parihar, S Kumar, S Chatterjee, G Pahwa, YS Chauhan, H Amrouch
2024
Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5nm FinFETs
SS Parihar, S Thomann, G Pahwa, YS Chauhan, H Amrouch
IEEE Open Journal of Circuits and Systems, 2023
2023
Cryogenic Embedded System to Support Quantum Computing: From 5nm FinFET to Full Processor
PR Genssler, F Klemme, SS Parihar, S Brandhofer, G Pahwa, I Polian, ...
IEEE Transactions on Quantum Engineering, 2023
2023
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