Low complexity bit parallel architectures for polynomial basis multiplication over GF (2m) A Reyhani-Masoleh, A Hasan Computers, IEEE Transactions on 53 (8), 945-959, 2004 | 337 | 2004 |
A new construction of Massey-Omura parallel multiplier over GF (2/sup m/) A Reyhani-Masoleh, MA Hasan IEEE Transactions on Computers 51 (5), 511-520, 2002 | 216 | 2002 |
Concurrent structure-independent fault detection schemes for the advanced encryption standard M Mozaffari-Kermani, A Reyhani-Masoleh IEEE Transactions on Computers 59 (5), 608-622, 2010 | 173 | 2010 |
Efficient algorithms and architectures for field multiplication using Gaussian normal bases A Reyhani-Masoleh IEEE Transactions on Computers 55 (1), 34-47, 2005 | 146 | 2005 |
A lightweight high-performance fault detection scheme for the advanced encryption standard using composite fields M Mozaffari-Kermani, A Reyhani-Masoleh IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (1), 85-91, 2009 | 123 | 2009 |
Efficient and high-performance parallel hardware architectures for the AES-GCM M Mozaffari-Kermani, A Reyhani-Masoleh IEEE Transactions on Computers 61 (8), 1165-1178, 2011 | 118 | 2011 |
Low complexity word-level sequential normal basis multipliers A Reyhani-Masoleh, MA Hasan IEEE Transactions on Computers 54 (2), 98-110, 2005 | 111 | 2005 |
Efficient FPGA implementations of point multiplication on binary Edwards and generalized Hessian curves using Gaussian normal basis R Azarderakhsh, A Reyhani-Masoleh IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (8 …, 2011 | 104 | 2011 |
Efficient digit-serial normal basis multipliers over binary extension fields A Reyhani-Masoleh, MA Hasan ACM Transactions on Embedded Computing Systems (TECS) 3 (3), 575-592, 2004 | 101* | 2004 |
Efficient and concurrent reliable realization of the secure cryptographic SHA-3 algorithm S Bayat-Sarmadi, M Mozaffari-Kermani, A Reyhani-Masoleh IEEE transactions on computer-aided design of integrated circuits and …, 2014 | 88 | 2014 |
Fault detection architectures for field multiplication using polynomial bases A Reyhani-Masoleh, MA Hasan IEEE Transactions on Computers 55 (9), 1089-1103, 2006 | 87 | 2006 |
Bit-serial and bit-parallel montgomery multiplication and squaring over GF (2^ m) A Hariri, A Reyhani-Masoleh IEEE Transactions on Computers 58 (10), 1332-1345, 2009 | 81 | 2009 |
Parity-based fault detection architecture of S-box for advanced encryption standard MM Kermani, A Reyhani-Masoleh 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2006 | 79 | 2006 |
Low-complexity multiplier architectures for single and hybrid-double multiplications in Gaussian normal bases R Azarderakhsh, A Reyhani-Masoleh IEEE Transactions on Computers 62 (4), 744-757, 2012 | 78 | 2012 |
Parallel and high-speed computations of elliptic curve cryptography using hybrid-double multipliers R Azarderakhsh, A Reyhani-Masoleh IEEE Transactions on Parallel and Distributed Systems 26 (6), 1668-1677, 2014 | 69 | 2014 |
Secure clustering and symmetric key establishment in heterogeneous wireless sensor networks R Azarderskhsh, A Reyhani-Masoleh EURASIP Journal on Wireless Communications and Networking 2011, 1-12, 2011 | 65 | 2011 |
Efficient multiplication beyond optimal normal bases A Reyhani-Masoleh, MA Hasan IEEE Transactions on Computers 52 (4), 428-439, 2003 | 65* | 2003 |
Fault detection structures of the S-boxes and the inverse S-boxes for the advanced encryption standard M Mozaffari-Kermani, A Reyhani-Masoleh Journal of Electronic Testing 25, 225-245, 2009 | 60 | 2009 |
A high-performance fault diagnosis approach for the AES SubBytes utilizing mixed bases M Mozaffari-Kermani, A Reyhani-Masoleh 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 80-87, 2011 | 58 | 2011 |
Reliable hardware architectures for the third-round SHA-3 finalist Grostl benchmarked on FPGA platform M Mozaffari-Kermani, A Reyhani-Masoleh 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2011 | 56 | 2011 |