Krste Asanovic

Citirano

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Suautori

David PattersonProfessor of Computer Science, UC BerkeleyPotvrđena adresa e-pošte na cs.berkeley.edu
Yunsup LeeSiFivePotvrđena adresa e-pošte na sifive.com
Andrew WatermanUC BerkeleyPotvrđena adresa e-pošte na eecs.berkeley.edu
John WAWRZYNEKProfessor of EECS, University of California, BerkeleyPotvrđena adresa e-pošte na berkeley.edu
Borivoje NikolicUniversity of California BerkeleyPotvrđena adresa e-pošte na berkeley.edu
Vladimir StojanovicProfessor of Electrical Engineering and Computer Sciences, University of CaliforniaPotvrđena adresa e-pošte na berkeley.edu
Christopher BattenCornell UniversityPotvrđena adresa e-pošte na cornell.edu
John KubiatowiczUniversity of California at BerkeleyPotvrđena adresa e-pošte na cs.berkeley.edu
Jonathan Bachrachadjunct assistant professor of computer science, uc berkeley universityPotvrđena adresa e-pošte na eecs.berkeley.edu
Scott BeamerUC Santa CruzPotvrđena adresa e-pošte na ucsc.edu
Katherine YelickAssociate Laboratory Director of Computing Sciences, LBNL and EECS Professor, UC BerkeleyPotvrđena adresa e-pošte na lbl.gov
Nelson MorganICSIPotvrđena adresa e-pošte na icsi.berkeley.edu
Henry CookGraduate Student, EECS Department, University of California BerkeleyPotvrđena adresa e-pošte na eecs.berkeley.edu
James W DEMMELProfessor of EECS and Mathematics, UC BerkeleyPotvrđena adresa e-pošte na berkeley.edu
Emmett WitchelProfessor of Computer Science, The University of Texas at AustinPotvrđena adresa e-pošte na cs.utexas.edu
Brian ZimmerSenior Research Scientist, NVIDIAPotvrđena adresa e-pošte na nvidia.com
Martin MaasGoogle DeepMindPotvrđena adresa e-pošte na google.com
Christos KozyrakisStanford UniversityPotvrđena adresa e-pošte na stanford.edu
John ShalfDepartment Head for Computer Science, Lawrence Berkeley National LaboratoryPotvrđena adresa e-pošte na lbl.gov
Jeffrey A. BilmesProfessor of Electrical Engineering and Computer Science, University of Washington SeattlePotvrđena adresa e-pošte na uw.edu

Prati

Krste Asanovic

UC Berkeley

Potvrđena adresa e-pošte na berkeley.edu - Početna stranica

Computer Architecture VLSI Design Parallel Programming


Naslov Poredaj po navodima Poredaj po godini Poredaj po naslovu	Citirano Citirano	Godina
The landscape of parallel computing research: A view from berkeley K Asanovic, R Bodik, BC Catanzaro, JJ Gebis, P Husbands, K Keutzer, ... eScholarship, University of California 1, 1, 2006	3079	2006
Single-chip microprocessor that communicates directly using light C Sun, MT Wade, Y Lee, JS Orcutt, L Alloatti, MS Georgas, AS Waterman, ... Nature 528 (7583), 534-538, 2015	1234	2015
Chisel: constructing hardware in a scala embedded language J Bachrach, H Vo, B Richards, Y Lee, A Waterman, R Avižienis, ... Proceedings of the 49th Annual Design Automation Conference, 1216-1225, 2012	1068	2012
A view of the parallel computing landscape K Asanovic, R Bodik, J Demmel, T Keaveny, K Keutzer, J Kubiatowicz, ... Communications of the ACM 52 (10), 56-67, 2009	934	2009
Optimizing matrix multiply using PHiPAC: a portable, high-performance, ANSI C coding methodology J Bilmes, K Asanovic, CW Chin, J Demmel ACM International Conference on Supercomputing 25th Anniversary Volume, 253-260, 1997	794	1997
Unbounded transactional memory CS Ananian, K Asanovic, BC Kuszmaul, CE Leiserson, S Lie 11th International Symposium on High-Performance Computer Architecture, 316-327, 2005	747	2005
The Rocket Chip Generator K Asanovi, R Avizienis, J Bachrach, S Beamer, D Biancolin, C Celio, ... Technical Report No. UCB/EECS-2016-17, 2016	744*	2016
Energy-aware lossless data compression KC Barr, K Asanović ACM Transactions on Computer Systems (TOCS) 24 (3), 250-291, 2006	696	2006
Direction-optimizing breadth-first search S Beamer, K Asanovic, D Patterson SC'12: Proceedings of the International Conference on High Performance …, 2012	678	2012
Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics C Batten, A Joshi, J Orcutt, A Khilo, B Moss, CW Holzwarth, MA Popovic, ... IEEE Micro 29 (4), 8-21, 2009	571	2009
Victim replication: Maximizing capacity while hiding wire delay in tiled chip multiprocessors M Zhang, K Asanovic 32nd International Symposium on Computer Architecture (ISCA'05), 336-345, 2005	504	2005
The RISC-V Instruction Set Manual, Volume I: User-Level ISA, Version 2.1 A Waterman, Y Lee, DA Patterson, K Asanović	476*	2016
Reducing power density through activity migration S Heo, K Barr, K Asanović Proceedings of the 2003 international symposium on Low power electronics and …, 2003	452	2003
Silicon-photonic clos networks for global on-chip communication A Joshi, C Batten, YJ Kwon, S Beamer, I Shamim, K Asanovic, ... 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 124-133, 2009	440	2009
Mondrian memory protection E Witchel, J Cates, K Asanovic Proceedings of the 10th Int’l Conference on Architectural Support for …, 2002	437	2002
Keystone: An open framework for architecting trusted execution environments D Lee, D Kohlbrenner, S Shinde, K Asanović, D Song Proceedings of the Fifteenth European Conference on Computer Systems, 1-16, 2020	429*	2020
The GAP benchmark suite S Beamer, K Asanović, D Patterson arXiv preprint arXiv:1508.03619, 2015	379	2015
The RISC-V instruction set manual: User-level ISA version 2.0 A Waterman, Y Lee, DA Patterson, K Asanovic Dept. Elect. Eng. Comput. Sci., Univ. California, Berkeley, Berkeley, CA …, 2014	365*	2014
Dynamic zero compression for cache energy reduction L Villa, M Zhang, K Asanović MICRO 33: Proceedings of the 33rd annual international symposium on Microar …, 2000	292	2000
Phantom: Practical oblivious computation in a secure processor M Maas, E Love, E Stefanov, M Tiwari, E Shi, K Asanovic, J Kubiatowicz, ... Proceedings of the 2013 ACM SIGSAC conference on Computer & communications …, 2013	285	2013

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