Giovanni Agosta
Giovanni Agosta
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Design of a parallel AES for graphics hardware using the CUDA framework
A Di Biagio, A Barenghi, G Agosta, G Pelosi
Parallel & Distributed Processing, 2009. IPDPS 2009. IEEE International …, 2009
rev. ng: a unified binary analysis framework to recover CFGs and function boundaries
A Di Federico, M Payer, G Agosta
Proceedings of the 26th International Conference on Compiler Construction …, 2017
A code morphing methodology to automate power analysis countermeasures
G Agosta, A Barenghi, G Pelosi
Proceedings of the 49th Annual Design Automation Conference, 77-82, 2012
Automated security analysis of dynamic web applications through symbolic code execution
G Agosta, A Barenghi, A Parata, G Pelosi
2012 Ninth International COnference on Information Technology-New …, 2012
Tools for Reduced Precision Computation: A Survey
S Cherubin, G Agosta
ACM Computing Surveys (CSUR) 53 (2), 1-35, 2020
Compiler-based side channel vulnerability analysis and optimized countermeasures application
G Agosta, A Barenghi, M Maggi, G Pelosi
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2013
The ANTAREX approach to autotuning and adaptivity for energy efficient HPC systems
C Silvano, G Agosta, S Cherubin, D Gadioli, G Palermo, A Bartolini, ...
Proceedings of the ACM International Conference on Computing Frontiers, 288-293, 2016
Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores
M Gautschi, A Traber, A Pullini, L Benini, M Scandale, A Di Federico, ...
2015 IFIP/IEEE International Conference on Very Large Scale Integration …, 2015
TAFFO: Tuning assistant for floating to fixed point optimization
S Cherubin, D Cattaneo, M Chiari, A Di Bello, G Agosta
IEEE Embedded Systems Letters 12 (1), 5-8, 2019
Record setting software implementation of DES using CUDA
G Agosta, A Barenghi, F De Santis, G Pelosi
2010 Seventh International Conference on Information Technology: New …, 2010
Managing Heterogeneous Resources in HPC Systems
G Agosta, W Fornaciari, G Massari, A Pupykina, F Reghenzani, M Zanella
Proceedings of the 9th Workshop and 7th Workshop on Parallel Programming and …, 2018
A highly flexible, parallel virtual machine: design and experience of ILDJIT
S Campanoni, G Agosta, S Crespi Reghizzi, A Di Biagio
Software: Practice and Experience 40 (2), 177-207, 2010
A jump-target identification method for multi-architecture static binary translation
A Di Federico, G Agosta
Proceedings of the International Conference on Compilers, Architectures and …, 2016
The MEET Approach: Securing Cryptographic Embedded Software Against Side Channel Attacks
G Agosta, A Barenghi, G Pelosi, M Scandale
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2015
OpenCL performance portability for general‐purpose computation on graphics processor units: an exploration on cryptographic primitives
G Agosta, A Barenghi, A Di Federico, G Pelosi
Concurrency and Computation: Practice and Experience 27 (14), 3633-3660, 2015
MANGO: Exploring Manycore Architectures for Next-GeneratiOn HPC Systems
J Flich, G Agosta, P Ampletzer, DA Alonso, C Brandolese, E Cappe, ...
Euromicro Conference on Digital System Design (DSD), 478-485, 2017
Fast disk Encryption through GPGPU acceleration
G Agosta, A Barenghi, F De Santis, A Di Biagio, G Pelosi
2009 International Conference on Parallel and Distributed Computing …, 2009
Dynamic Precision Autotuning with TAFFO
S Cherubin, D Cattaneo, M Chiari, G Agosta
ACM Transactions on Architecture and Code Optimization (TACO) 17 (2), 1-26, 2020
Implications of Reduced-Precision Computations in HPC: Performance, Energy and Error
S Cherubin, G Agosta, I Lasri, E Rohou, O Sentieys
International Conference on Parallel Computing (ParCo), 2017
Countermeasures against branch target buffer attacks
G Agosta, L Breveglieri, G Pelosi, I Koren
Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2007), 75-79, 2007
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