Paria Darbani - Google Scholar

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	All	Since 2020
Citations	18	14
h-index	2	1
i10-index	1	1

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8

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201520162017201820192020202120222023202420251 2 1 1 4 8 1

Co-authors

Pejman Lotfi-KamranAssociate Professor of Computer Science, IPMVerified email at ipm.ir
Hakem BeitollahiSoran UniversityVerified email at visitors.soran.edu.iq
Nezam RohbaniBarcelona Supercomputing Center (BSC)Verified email at ipm.ir
Hamid R. ZarandiAssociate Professor, Department of Computer Engineering, Amirkabir University of TechnologyVerified email at aut.ac.ir

Paria Darbani

Paria Darbani

Institute for Research in Fundamental Sciences(IPM)

Verified email at ipm.ir - Homepage

Machin learning accelerators


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
RASHT: A partially reconfigurable architecture for efficient implementation of CNNs P Darbani, N Rohbani, H Beitollahi, P Lotfi-Kamran IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (7), 860-868, 2022	13	2022
A reconfigurable Network-on-Chip architecture to improve overall performance and throughput P Darbani, HR Zarandi 2014 22nd Iranian Conference on Electrical Engineering (ICEE), 943-948, 2014	4	2014
Rei: A Reconfigurable Interconnection Unit for Array-Based CNN Accelerators P Darbani, H Beitollahi, P Lotfi-Kamran IEEE Transactions on Emerging Topics in Computing 11 (4), 895-906, 2023	1	2023
A. Steering Committee A Movaghar, A Ejlali, M Kargahi, MJ Yazdanpanah, P Lotfi-Kamran, ...
A Reconfigurable NoC Architecture to Improve Overall Performance and Throughput P Darbani, HR Zarandi

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Articles 1–5