| Hardware Trojan horses in cryptographic IP cores S Bhasin, JL Danger, S Guilley, XT Ngo, L Sauvage 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 15-29, 2013 | 170 | 2013 |
| High precision fault injections on the instruction cache of ARMv7-M architectures L Riviere, Z Najm, P Rauzy, JL Danger, J Bringer, L Sauvage 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015 | 113 | 2015 |
| Analysis of electromagnetic information leakage from cryptographic devices with different physical structures YI Hayashi, N Homma, T Mizuki, T Aoki, H Sone, L Sauvage, JL Danger IEEE Transactions on Electromagnetic Compatibility 55 (3), 571-580, 2012 | 85 | 2012 |
| Electromagnetic radiations of fpgas: High spatial resolution cartography and attack on a cryptographic module L Sauvage, S Guilley, Y Mathieu ACM Transactions on Reconfigurable Technology and Systems (TRETS) 2 (1), 1-24, 2009 | 82 | 2009 |
| Overview of dual rail with precharge logic styles to thwart implementation-level attacks on hardware cryptoprocessors JL Danger, S Guilley, S Bhasin, M Nassar 2009 3rd International Conference on Signals, Circuits and Systems (SCS), 1-8, 2009 | 78 | 2009 |
| Security evaluation of WDDL and SecLib countermeasures against power attacks S Guilley, L Sauvage, P Hoogvorst, R Pacalet, GM Bertoni, S Chaudhuri IEEE Transactions on Computers 57 (11), 1482-1497, 2008 | 70 | 2008 |
| Evaluation of power constant dual-rail logics countermeasures against DPA with design time security metrics S Guilley, L Sauvage, F Flament, VN Vong, P Hoogvorst, R Pacalet IEEE Transactions on Computers 59 (9), 1250-1263, 2010 | 60 | 2010 |
| Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints L Sauvage, S Guilley, JL Danger, Y Mathieu, M Nassar 2009 Design, Automation & Test in Europe Conference & Exhibition, 640-645, 2009 | 56 | 2009 |
| Silicon-level solutions to counteract passive and active attacks S Guilley, L Sauvage, JL Danger, N Selmane, R Pacalet 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography, 3-17, 2008 | 54 | 2008 |
| Evaluation of power-constant dual-rail logic as a protection of cryptographic applications in FPGAs S Guilley, L Sauvage, JL Danger, T Graba, Y Mathieu 2008 Second International Conference on Secure System Integration and …, 2008 | 54 | 2008 |
| Fault injection resilience S Guilley, L Sauvage, JL Danger, N Selmane 2010 Workshop on Fault Diagnosis and Tolerance in Cryptography, 51-65, 2010 | 51 | 2010 |
| Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest C Clavier, JL Danger, G Duc, MA Elaabid, B Gérard, S Guilley, A Heuser, ... Journal of Cryptographic Engineering 4, 259-274, 2014 | 50 | 2014 |
| Efficient evaluation of EM radiation associated with information leakage from cryptographic devices Y Hayashi, N Homma, T Mizuki, H Shimada, T Aoki, H Sone, L Sauvage, ... IEEE Transactions on Electromagnetic Compatibility 55 (3), 555-563, 2012 | 46 | 2012 |
| Far correlation-based EMA with a precharacterized leakage model O Meynard, S Guilley, JL Danger, L Sauvage 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 44 | 2010 |
| Evaluation of countermeasure implementations based on boolean masking to thwart side-channel attacks H Maghrebi, JL Danger, F Flament, S Guilley, L Sauvage 2009 3rd international conference on signals, circuits and systems (SCS), 1-6, 2009 | 44 | 2009 |
| Shall we trust WDDL? S Guilley, S Chaudhuri, L Sauvage, T Graba, JL Danger, P Hoogvorst, ... Future of Trust in Computing: Proceedings of the First International …, 2009 | 41 | 2009 |
| Place-and-route impact on the security of DPL designs in FPGAs S Guilley, S Chaudhuri, L Sauvage, T Graba, JL Danger, P Hoogvorst, ... 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, 26-32, 2008 | 41 | 2008 |
| Defeating any secret cryptography with SCARE attacks S Guilley, L Sauvage, J Micolod, D Réal, F Valette International Conference on Cryptology and Information Security in Latin …, 2010 | 39 | 2010 |
| Combined SCA and DFA countermeasures integrable in a FPGA design flow S Bhasin, JL Danger, F Flament, T Graba, S Guilley, Y Mathieu, M Nassar, ... 2009 International Conference on Reconfigurable Computing and FPGAs, 213-218, 2009 | 34 | 2009 |
| Unrolling cryptographic circuits: A simple countermeasure against side-channel attacks S Bhasin, S Guilley, L Sauvage, JL Danger Topics in Cryptology-CT-RSA 2010: The Cryptographers’ Track at the RSA …, 2010 | 32 | 2010 |
