HeteroCL: A multi-paradigm programming infrastructure for software-defined reconfigurable computing YH Lai, Y Chi, Y Hu, J Wang, CH Yu, Y Zhou, J Cong, Z Zhang Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019 | 168* | 2019 |
Rosetta: A realistic high-level synthesis benchmark suite for software programmable FPGAs Y Zhou, U Gupta, S Dai, R Zhao, N Srivastava, H Jin, J Featherston, ... Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018 | 156 | 2018 |
SuSy: A programming model for productive construction of high-performance systolic arrays on FPGAs YH Lai, H Rong, S Zheng, W Zhang, X Cui, Y Jia, J Wang, B Sullivan, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 54 | 2020 |
Programming and synthesis for software-defined FPGA acceleration: status and future prospects YH Lai, E Ustun, S Xiang, Z Fang, H Rong, Z Zhang ACM Transactions on Reconfigurable Technology and Systems (TRETS) 14 (4), 1-39, 2021 | 42 | 2021 |
Heteroflow: An accelerator programming model with decoupled data placement for software-defined fpgas S Xiang, YH Lai, Y Zhou, H Chen, N Zhang, D Pal, Z Zhang Proceedings of the 2022 ACM/SIGDA International Symposium on Field …, 2022 | 26 | 2022 |
Bring your own codegen to deep learning compiler Z Chen, CH Yu, T Morris, J Tuyls, YH Lai, J Roesch, E Delaye, V Sharma, ... arXiv preprint arXiv:2105.03215, 2021 | 18 | 2021 |
Synthesis of PCHB-WCHB hybrid quasi-delay insensitive circuits CC Chuang, YH Lai, JHR Jiang Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 15 | 2014 |
SPOCK: Static performance analysis and deadlock verification for efficient asynchronous circuit synthesis CH Shih, YH Lai, JHR Jiang 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 442-449, 2015 | 14 | 2015 |
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits NZ Lee, HY Kuo, YH Lai, JHR Jiang 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 12 | 2016 |
A general framework for efficient performance analysis of acyclic asynchronous pipelines YH Lai, CC Chuang, JHR Jiang 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 736-743, 2015 | 7 | 2015 |
Logic circuit and system and computer program product for logic synthesis C Chuang, YH Lai, J Chiang US Patent 9,576,094, 2017 | 6 | 2017 |
Accelerator design with decoupled hardware customizations: benefits and challenges D Pal, YH Lai, S Xiang, N Zhang, H Chen, J Casas, P Cocchini, Z Yang, ... Proceedings of the 59th ACM/IEEE Design Automation Conference, 1351-1354, 2022 | 5 | 2022 |
Scalable synthesis of PCHB–WCHB hybrid quasi-delay insensitive circuits YH Lai, CC Chuang, JHR Jiang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 4 | 2016 |
Network logic synthesis C Chuang, YH Lai, J Chiang US Patent 10,496,773, 2019 | 1 | 2019 |
Asynchronous QDI circuit synthesis from signal transition protocols BY Huang, YH Lai, JHR Jiang 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 434-441, 2015 | 1 | 2015 |
Syncfree optimizers and compiler improvements for efficient model training S Subramanian, C Barrett, Y Wang, R Das, H Tummalacherla, L Ravi, ... 2023 IEEE 4th International Conference on Pattern Recognition and Machine …, 2023 | | 2023 |
FPGA-Specific Compilers N Srivastava, G Liu, YH Lai, Z Zhang Handbook of Computer Architecture, 1-37, 2022 | | 2022 |
Decoupling Algorithm from Hardware Customizations for Software-Defined Reconfigurable Computing YH Lai Cornell University, 2022 | | 2022 |
Computer product for making a semiconductor device C Chuang, YH Lai, J Chiang US Patent 11,120,183, 2021 | | 2021 |
SuSy YH Lai, H Rong, S Zheng, W Zhang, X Cui, Y Jia, J Wang, B Sullivan, ... Proceedings of the 39th International Conference on Computer-Aided Design, 2020 | | 2020 |