Prati
Chih-Chi Cheng
Chih-Chi Cheng
Senior Research Scientist, NVIDIA Research
Potvrđena adresa e-pošte na nvidia.com - Početna stranica
Naslov
Citirano
Citirano
Godina
Multimode embedded compression codec engine for power-aware video coding system
CC Cheng, PC Tseng, LG Chen
IEEE Transactions on Circuits and Systems for Video Technology 19 (2), 141-150, 2009
992009
Multi-mode embedded compression codec engine for power-aware video coding system
CC Cheng, PC Tseng, CT Huang, LG Chen
IEEE Workshop on Signal Processing Systems Design and Implementation, 2005 …, 2005
992005
iVisual: An intelligent visual sensor SoC with 2790 fps CMOS image sensor and 205 GOPS/W vision processor
CC Cheng, CH Lin, CT Li, LG Chen
IEEE Journal of Solid-State Circuits 44 (1), 127-135, 2009
802009
On-chip memory optimization scheme for VLSI implementation of line-based two-dimentional discrete wavelet transform
CC Cheng, CT Huang, CY Chen, CJ Lian, LG Chen
Circuits and Systems for Video Technology, IEEE Transactions on 17 (7), 814-822, 2007
392007
A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications
CP Lin, PC Tseng, YT Chiu, SS Lin, CC Cheng, HC Fang, WM Chao, ...
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical …, 2006
382006
A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine
CC Cheng, YM Tsai, LG Chen, AP Chandrakasan
Custom Integrated Circuits Conference (CICC), 2010 IEEE, 1-4, 2010
30*2010
Precompression quality-control algorithm for JPEG 2000
YW Chang, HC Fang, CC Cheng, CC Chen, LG Chen
IEEE Transactions on Image Processing 15 (11), 3279-3293, 2006
202006
A 216fps 4096× 2160p 3DTV set-top box SoC for free-viewpoint 3DTV applications
PK Tsung, PC Lin, KY Chen, TD Chuang, HJ Yang, SY Chien, LF Ding, ...
2011 IEEE International Solid-State Circuits Conference, 124-126, 2011
192011
Diastolic arrays: throughput-driven reconfigurable computing
MH Cho, CC Cheng, M Kinsy, GE Suh, S Devadas
Computer-Aided Design, 2008. ICCAD 2008. IEEE/ACM International Conference …, 2008
172008
VLSI DESIGN OF WAVELET TRANSFORM, ANALYSIS, ARCHITECTURE, AND DESIGN EXAMPLES
LG Chen, CT Huang, CY Chen, CC Cheng
Imperial College Press, 2007
172007
Quad full-hd transform engine for dual-standard low-power video coding
R Rithe, CC Cheng, AP Chandrakasan
IEEE Journal of Solid-State Circuits 47 (11), 2724-2736, 2012
132012
Memory efficient JPEG2000 architecture with stripe pipeline scheme
HC Fang, YW Chang, CC Cheng, CC Chen, LG Chen
Proceedings.(ICASSP'05). IEEE International Conference on Acoustics, Speech …, 2005
112005
Efficient architecture design of motion-compensated temporal filtering/motion compensated prediction engine
YH Chen, CC Cheng, TD Chuang, CY Chen, SY Chien, LG Chen
Circuits and Systems for Video Technology, IEEE Transactions on 18 (1), 98-109, 2008
102008
124 MSamples/s pixel-pipelined motion-JPEG 2000 codec without tile memory
YW Chang, CC Cheng, CC Chen, HC Fang, LG Chen
IEEE transactions on circuits and systems for video technology 17 (4), 398-406, 2007
82007
Memory efficient JPEG 2000 architecture with stripe pipeline scheduling
HC Fang, YW Chang, CC Cheng, LG Chen
IEEE transactions on signal processing 54 (12), 4807-4816, 2006
82006
124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory
YW Chang, HC Fang, CC Cheng, CC Chen, CJ Lian, SY Chien, LG Chen
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006
82006
Multiple-lifting scheme: Memory-efficient VLSI implementation for line-based 2-D DWT
CC Cheng, CT Huang, PC Tseng, CH Pan, LG Chen
2005 IEEE International Symposium on Circuits and Systems, 5190-5193, 2005
72005
System architecture design methodology for H. 264/AVC encoder
SC Chang, CC Cheng, LG Chen
2007 IEEE International Symposium on Consumer Electronics, 1-5, 2007
52007
Line buffer wordlength analysis for line-based 2-D DWT
CC Cheng, CT Huang, JY Chang, LG Chen
2006 IEEE International Conference on Acoustics Speech and Signal Processing …, 2006
32006
Analysis and VLSI architecture of update step in motion-compensated temporal filtering
CC Cheng, CY Chen, YH Chen, LG Chen
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International …, 2006
22006
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